Discussion:
SAMDL SPI patch
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mthompson@hexwave.com [nuttx]
2018-01-10 18:55:43 UTC
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This is a small patch that fixes an issue with SPI on SAMDL.


In sam_spibus_initialize(), the pinmux configuration was smashing the previous CTRLA register configuration.


Regards,
Matt
mthompson@hexwave.com [nuttx]
2018-01-10 19:00:52 UTC
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There are also some typos in samd_spi.h

diff --git a/arch/arm/src/samdl/chip/samd_spi.h b/arch/arm/src/samdl/chip/samd_spi.h
index 8bdcc9e21e..a90a9fc607 100644
--- a/arch/arm/src/samdl/chip/samd_spi.h
+++ b/arch/arm/src/samdl/chip/samd_spi.h
@@ -247,8 +247,8 @@
#endif


#ifdef CONFIG_ARCH_FAMILY_SAMD21
-# define SPI_INT_ SSL (1 << 3) /* Bit 3: Slave select low interrupt */
-# define SPI_INT_ ERROR (1 << 7) /* Bit 7: Error interrupt */
+# define SPI_INT_SSL (1 << 3) /* Bit 3: Slave select low interrupt */
+# define SPI_INT_ERROR (1 << 7) /* Bit 7: Error interrupt */


# define SPI_INT_ALL (0x8f)
#endif
Alan Carvalho de Assis acassis@gmail.com [nuttx]
2018-01-11 11:15:17 UTC
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Hi Matt,

How are you?

Just a question: why are you disabling the MSB first order when the
SPI initializes?

The default for SPI is MSB first. Case the device you are trying to
communicate with is LSB first, you can change its configuration before
communicating with it.

BR,

Alan
Post by ***@hexwave.com [nuttx]
This is a small patch that fixes an issue with SPI on SAMDL.
In sam_spibus_initialize(), the pinmux configuration was smashing the
previous CTRLA register configuration.
Regards,
Matt
spudarnia@yahoo.com [nuttx]
2018-01-11 13:36:02 UTC
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My understanding of the change is that you are concerned that the second write to the CTRLA register is losing the SPI Master and SPI form bits. Is that correct?

If we are going read the register, OR in new values, and the write back, we should also make sure that the fields that are OR'ed in are also zeroed first.

So this looks a little different from your patch. Let me know if it is okay:

commit 537c9a27d1e11ae664aefe210a0a2cff68871669
Author: Matt Thompson <***@hexwave.com>
Date: Thu Jan 11 07:34:56 2018 -0600

arch/arm/src/samdl: In sam_spibus_initialize(), the pinmux configuration was smashing the previous CTRLA register configuration. There are also some typos in samd_spi.h

Greg
mthompson@hexwave.com [nuttx]
2018-01-11 20:44:21 UTC
Permalink
Yes, that's right. Previously when muxconfig was written, it was forcing mode to 0 (which is invalid), and the chip would hang when setting the ENABLE bit.

Your modification of the patch looks good. Thanks!


Tested master on my setup, and SPI is working with an LIS3DH accelerometer.


Matt

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